When a semiconductor device such as a metal-oxide-semiconductor field-effect transistors (MOSFETs) is scaled down through various technology nodes, high k dielectric material and metal are adopted to form a gate stack. However, in a method to form metal gate stacks for nMOS transistors and pMOS transistors, various issues may arise when integrating the processes and materials for this purpose. For example, the pMOS transistors may have a poor performance. In another example, the work functions for nMOS transistor and pMOS transistors cannot be tuned independently and properly.
Table 1 and Table 2 provide various schemes of high k and metal gate stacks constructed according to aspects of the present disclosure in several embodiments.